A photodetector includes one or more photodiodes and integrating circuits each outputting a voltage value corresponding to the amount of charge outputted from the associated photodiode. In such a photodetector, charges generated by the photodiodes in response to light incidence are accumulated in integral capacitor units of the integrating circuits, and then voltage values corresponding to the amount of accumulated charge are output from the integrating circuits. The intensity of incident light to the photodiodes can be obtained based on the voltage values outputted from the integrating circuits. It is noted that photodetectors with a plurality of photodiodes arranged one- or two-dimensionally therein are utilized as solid-state imaging devices.
A photodetector having such a structure as described above can be produced by CMOS technology, where the dynamic range for detecting incident light intensity can be increased by changing the capacitance of integral capacitor units for converting the amount of input charge into output voltage values in the integrating circuits. For example, in the photodetector described in Non-Patent Document 1, each integrating circuit has an integral capacitor unit with the variable capacitance provided between the input and output terminals of an amplifier, where charges outputted from photodiodes are accumulated in the integral capacitor units and voltage values corresponding to the amount of accumulated charge are output. Then, in the photodetector described in Non-Patent Document 1, external control is provided to set the capacitance of the integral capacitor units appropriately and thereby to increase the dynamic range for detecting incident light intensity.
That is, even in the case of a low incident light intensity, reducing the capacitance of the integral capacitor units allows detection sensitivity to be improved, while even in the case of a high incident light intensity, increasing the capacitance of the integral capacitor units allows saturation of output signals to be avoided. Even in the case of imaging a very bright subject during a midsummer day for example, applying such a photodetector (solid-state imaging device) allows the subject to be imaged with no saturation of output signals. Also, even in the case of imaging a very dark subject at night for example, the subject can be imaged at a high sensitivity.
Further, there may be provided CDS (Correlated Double Sampling) circuits at the subsequent stage of the respective integrating circuits. The CDS circuits output voltage values corresponding to the difference between voltage values to be outputted from the integrating circuits, respectively, at the beginning and end of charge accumulation operations in the integrating circuits. Providing the CDS circuits allows reset switching noise in the integrating circuits to be eliminated and thereby light detection at a high S/N ratio to be achieved.
Non-Patent Document 1: S. L. Garverick, et al., “A 32-Channel Charge Readout IC for Programmable, Nonlinear Quantization of Multichannel Detector Data,” IEEE Journal of Solid-State Circuits, Vol. 30, No. 5, pp. 533-541 (1995)